CVE-2024-53048

In the Linux kernel, the following vulnerability has been resolved:<br /> <br /> ice: fix crash on probe for DPLL enabled E810 LOM<br /> <br /> The E810 Lan On Motherboard (LOM) design is vendor specific. Intel<br /> provides the reference design, but it is up to vendor on the final<br /> product design. For some cases, like Linux DPLL support, the static<br /> values defined in the driver does not reflect the actual LOM design.<br /> Current implementation of dpll pins is causing the crash on probe<br /> of the ice driver for such DPLL enabled E810 LOM designs:<br /> <br /> WARNING: (...) at drivers/dpll/dpll_core.c:495 dpll_pin_get+0x2c4/0x330<br /> ...<br /> Call Trace:<br /> <br /> ? __warn+0x83/0x130<br /> ? dpll_pin_get+0x2c4/0x330<br /> ? report_bug+0x1b7/0x1d0<br /> ? handle_bug+0x42/0x70<br /> ? exc_invalid_op+0x18/0x70<br /> ? asm_exc_invalid_op+0x1a/0x20<br /> ? dpll_pin_get+0x117/0x330<br /> ? dpll_pin_get+0x2c4/0x330<br /> ? dpll_pin_get+0x117/0x330<br /> ice_dpll_get_pins.isra.0+0x52/0xe0 [ice]<br /> ...<br /> <br /> The number of dpll pins enabled by LOM vendor is greater than expected<br /> and defined in the driver for Intel designed NICs, which causes the crash.<br /> <br /> Prevent the crash and allow generic pin initialization within Linux DPLL<br /> subsystem for DPLL enabled E810 LOM designs.<br /> <br /> Newly designed solution for described issue will be based on "per HW<br /> design" pin initialization. It requires pin information dynamically<br /> acquired from the firmware and is already in progress, planned for<br /> next-tree only.