CVE-2026-45945
Severity CVSS v4.0:
Pending analysis
Type:
CWE-362
Concurrent Execution using Shared Resource with Improper Synchronization ('Race Condition')
Publication date:
27/05/2026
Last modified:
16/06/2026
Description
In the Linux kernel, the following vulnerability has been resolved:<br />
<br />
iommu/vt-d: Fix race condition during PASID entry replacement<br />
<br />
The Intel VT-d PASID table entry is 512 bits (64 bytes). When replacing<br />
an active PASID entry (e.g., during domain replacement), the current<br />
implementation calculates a new entry on the stack and copies it to the<br />
table using a single structure assignment.<br />
<br />
struct pasid_entry *pte, new_pte;<br />
<br />
pte = intel_pasid_get_entry(dev, pasid);<br />
pasid_pte_config_first_level(iommu, &new_pte, ...);<br />
*pte = new_pte;<br />
<br />
Because the hardware may fetch the 512-bit PASID entry in multiple<br />
128-bit chunks, updating the entire entry while it is active (Present<br />
bit set) risks a "torn" read. In this scenario, the IOMMU hardware<br />
could observe an inconsistent state — partially new data and partially<br />
old data — leading to unpredictable behavior or spurious faults.<br />
<br />
Fix this by removing the unsafe "replace" helpers and following the<br />
"clear-then-update" flow, which ensures the Present bit is cleared and<br />
the required invalidation handshake is completed before the new<br />
configuration is applied.
Impact
Base Score 3.x
8.80
Severity 3.x
HIGH
Vulnerable products and versions
| CPE | From | Up to |
|---|---|---|
| cpe:2.3:o:linux:linux_kernel:*:*:*:*:*:*:*:* | 6.13 (including) | 6.19.4 (excluding) |
To consult the complete list of CPE names with products and versions, see this page



