CVE-2022-27813

Severity CVSS v4.0:

Pending analysis

Type:

Unavailable / Other

Publication date:

19/10/2023

Last modified:

07/11/2023

Description

Motorola MTM5000 series firmwares lack properly configured memory protection of pages shared between the OMAP-L138 ARM and DSP cores. The SoC provides two memory protection units, MPU1 and MPU2, to enforce the trust boundary between the two cores. Since both units are left unconfigured by the firmwares, an adversary with control over either core can trivially gain code execution on the other, by overwriting code located in shared RAM or DDR2 memory regions.

Impact

Vector 3.x

CVSS:3.1/AV:L/AC:L/PR:H/UI:N/S:C/C:H/I:H/A:H CVSS v3.1 Severity and Metrics:

Base Score: 8.20 HIGH
Vector: CVSS:3.1/AV:L/AC:L/PR:H/UI:N/S:C/C:H/I:H/A:H

Attack Vector (AV): Local
Attack Complexity (AC): Low
Privileges Required (PR): High
User Interaction (UI): None
Scope (S): Changed
Confidentiality (C): High
Integrity (I): High
Availability (A): High

Base Score 3.x

8.20

Severity 3.x

HIGH

Vulnerable products and versions

CPE	From	Up to
cpe:2.3:o:motorola:mtm5500_firmware:-:::::::*
cpe:2.3:h:motorola:mtm5500:-:::::::*
cpe:2.3:o:motorola:mtm5400_firmware:-:::::::*
cpe:2.3:h:motorola:mtm5400:-:::::::*

To consult the complete list of CPE names with products and versions, see this page

References to Advisories, Solutions, and Tools

https://tetraburst.com/

CPE	From	Up to
cpe:2.3:o:motorola:mtm5500_firmware:-:::::::*
cpe:2.3:h:motorola:mtm5500:-:::::::*
cpe:2.3:o:motorola:mtm5400_firmware:-:::::::*
cpe:2.3:h:motorola:mtm5400:-:::::::*