CVE-2024-42279
Severity CVSS v4.0:
Pending analysis
Type:
Unavailable / Other
Publication date:
17/08/2024
Last modified:
02/10/2025
Description
In the Linux kernel, the following vulnerability has been resolved:<br />
<br />
spi: microchip-core: ensure TX and RX FIFOs are empty at start of a transfer<br />
<br />
While transmitting with rx_len == 0, the RX FIFO is not going to be<br />
emptied in the interrupt handler. A subsequent transfer could then<br />
read crap from the previous transfer out of the RX FIFO into the<br />
start RX buffer. The core provides a register that will empty the RX and<br />
TX FIFOs, so do that before each transfer.
Impact
Base Score 3.x
5.50
Severity 3.x
MEDIUM
Vulnerable products and versions
| CPE | From | Up to |
|---|---|---|
| cpe:2.3:o:linux:linux_kernel:*:*:*:*:*:*:*:* | 6.0 (including) | 6.6.44 (excluding) |
| cpe:2.3:o:linux:linux_kernel:*:*:*:*:*:*:*:* | 6.7 (including) | 6.10.3 (excluding) |
To consult the complete list of CPE names with products and versions, see this page



