CVE-2026-23554
Severity CVSS v4.0:
Pending analysis
Type:
Unavailable / Other
Publication date:
23/03/2026
Last modified:
23/03/2026
Description
The Intel EPT paging code uses an optimization to defer flushing of any cached<br />
EPT state until the p2m lock is dropped, so that multiple modifications done<br />
under the same locked region only issue a single flush.<br />
<br />
Freeing of paging structures however is not deferred until the flushing is<br />
done, and can result in freed pages transiently being present in cached state.<br />
Such stale entries can point to memory ranges not owned by the guest, thus<br />
allowing access to unintended memory regions.
Impact
Base Score 3.x
7.80
Severity 3.x
HIGH