CVE-2026-53051

In the Linux kernel, the following vulnerability has been resolved:<br /> <br /> PCI: tegra194: Fix CBB timeout caused by DBI access before core power-on<br /> <br /> When PERST# is deasserted twice (assert -&gt; deassert -&gt; assert -&gt; deassert),<br /> a CBB (Control Backbone) timeout occurs at DBI register offset 0x8bc<br /> (PCIE_MISC_CONTROL_1_OFF). This happens because pci_epc_deinit_notify()<br /> and dw_pcie_ep_cleanup() are called before reset_control_deassert() powers<br /> on the controller core.<br /> <br /> The call chain that causes the timeout:<br /> <br /> pex_ep_event_pex_rst_deassert()<br /> pci_epc_deinit_notify()<br /> pci_epf_test_epc_deinit()<br /> pci_epf_test_clear_bar()<br /> pci_epc_clear_bar()<br /> dw_pcie_ep_clear_bar()<br /> __dw_pcie_ep_reset_bar()<br /> dw_pcie_dbi_ro_wr_en() core_rst) core_rst). Accessing them before this point<br /> results in a CBB timeout because the hardware is not yet operational.<br /> <br /> Fix this by moving pci_epc_deinit_notify() and dw_pcie_ep_cleanup() to<br /> after reset_control_deassert(pcie-&gt;core_rst), ensuring the controller is<br /> fully powered on before any DBI register accesses occur.