Instituto Nacional de ciberseguridad. Sección Incibe
Instituto Nacional de Ciberseguridad. Sección INCIBE-CERT

CVE-2026-45945

Gravedad CVSS v3.1:
ALTA
Tipo:
CWE-362 Ejecución concurrente utilizando recursos compartidos con una incorrecta sincronización (Condición de carrera)
Fecha de publicación:
27/05/2026
Última modificación:
16/06/2026

Descripción

*** Pendiente de traducción *** In the Linux kernel, the following vulnerability has been resolved:<br /> <br /> iommu/vt-d: Fix race condition during PASID entry replacement<br /> <br /> The Intel VT-d PASID table entry is 512 bits (64 bytes). When replacing<br /> an active PASID entry (e.g., during domain replacement), the current<br /> implementation calculates a new entry on the stack and copies it to the<br /> table using a single structure assignment.<br /> <br /> struct pasid_entry *pte, new_pte;<br /> <br /> pte = intel_pasid_get_entry(dev, pasid);<br /> pasid_pte_config_first_level(iommu, &amp;new_pte, ...);<br /> *pte = new_pte;<br /> <br /> Because the hardware may fetch the 512-bit PASID entry in multiple<br /> 128-bit chunks, updating the entire entry while it is active (Present<br /> bit set) risks a "torn" read. In this scenario, the IOMMU hardware<br /> could observe an inconsistent state — partially new data and partially<br /> old data — leading to unpredictable behavior or spurious faults.<br /> <br /> Fix this by removing the unsafe "replace" helpers and following the<br /> "clear-then-update" flow, which ensures the Present bit is cleared and<br /> the required invalidation handshake is completed before the new<br /> configuration is applied.

Productos y versiones vulnerables

CPE Desde Hasta
cpe:2.3:o:linux:linux_kernel:*:*:*:*:*:*:*:* 6.13 (incluyendo) 6.19.4 (excluyendo)