CVE-2025-40222
Fecha de publicación:
04/12/2025
*** Pendiente de traducción *** In the Linux kernel, the following vulnerability has been resolved:<br />
<br />
tty: serial: sh-sci: fix RSCI FIFO overrun handling<br />
<br />
The receive error handling code is shared between RSCI and all other<br />
SCIF port types, but the RSCI overrun_reg is specified as a memory<br />
offset, while for other SCIF types it is an enum value used to index<br />
into the sci_port_params->regs array, as mentioned above the<br />
sci_serial_in() function.<br />
<br />
For RSCI, the overrun_reg is CSR (0x48), causing the sci_getreg() call<br />
inside the sci_handle_fifo_overrun() function to index outside the<br />
bounds of the regs array, which currently has a size of 20, as specified<br />
by SCI_NR_REGS.<br />
<br />
Because of this, we end up accessing memory outside of RSCI&#39;s<br />
rsci_port_params structure, which, when interpreted as a plat_sci_reg,<br />
happens to have a non-zero size, causing the following WARN when<br />
sci_serial_in() is called, as the accidental size does not match the<br />
supported register sizes.<br />
<br />
The existence of the overrun_reg needs to be checked because<br />
SCIx_SH3_SCIF_REGTYPE has overrun_reg set to SCLSR, but SCLSR is not<br />
present in the regs array.<br />
<br />
Avoid calling sci_getreg() for port types which don&#39;t use standard<br />
register handling.<br />
<br />
Use the ops->read_reg() and ops->write_reg() functions to properly read<br />
and write registers for RSCI, and change the type of the status variable<br />
to accommodate the 32-bit CSR register.<br />
<br />
sci_getreg() and sci_serial_in() are also called with overrun_reg in the<br />
sci_mpxed_interrupt() interrupt handler, but that code path is not used<br />
for RSCI, as it does not have a muxed interrupt.<br />
<br />
------------[ cut here ]------------<br />
Invalid register access<br />
WARNING: CPU: 0 PID: 0 at drivers/tty/serial/sh-sci.c:522 sci_serial_in+0x38/0xac<br />
Modules linked in: renesas_usbhs at24 rzt2h_adc industrialio_adc sha256 cfg80211 bluetooth ecdh_generic ecc rfkill fuse drm backlight ipv6<br />
CPU: 0 UID: 0 PID: 0 Comm: swapper/0 Not tainted 6.17.0-rc1+ #30 PREEMPT<br />
Hardware name: Renesas RZ/T2H EVK Board based on r9a09g077m44 (DT)<br />
pstate: 604000c5 (nZCv daIF +PAN -UAO -TCO -DIT -SSBS BTYPE=--)<br />
pc : sci_serial_in+0x38/0xac<br />
lr : sci_serial_in+0x38/0xac<br />
sp : ffff800080003e80<br />
x29: ffff800080003e80 x28: ffff800082195b80 x27: 000000000000000d<br />
x26: ffff8000821956d0 x25: 0000000000000000 x24: ffff800082195b80<br />
x23: ffff000180e0d800 x22: 0000000000000010 x21: 0000000000000000<br />
x20: 0000000000000010 x19: ffff000180e72000 x18: 000000000000000a<br />
x17: ffff8002bcee7000 x16: ffff800080000000 x15: 0720072007200720<br />
x14: 0720072007200720 x13: 0720072007200720 x12: 0720072007200720<br />
x11: 0000000000000058 x10: 0000000000000018 x9 : ffff8000821a6a48<br />
x8 : 0000000000057fa8 x7 : 0000000000000406 x6 : ffff8000821fea48<br />
x5 : ffff00033ef88408 x4 : ffff8002bcee7000 x3 : ffff800082195b80<br />
x2 : 0000000000000000 x1 : 0000000000000000 x0 : ffff800082195b80<br />
Call trace:<br />
sci_serial_in+0x38/0xac (P)<br />
sci_handle_fifo_overrun.isra.0+0x70/0x134<br />
sci_er_interrupt+0x50/0x39c<br />
__handle_irq_event_percpu+0x48/0x140<br />
handle_irq_event+0x44/0xb0<br />
handle_fasteoi_irq+0xf4/0x1a0<br />
handle_irq_desc+0x34/0x58<br />
generic_handle_domain_irq+0x1c/0x28<br />
gic_handle_irq+0x4c/0x140<br />
call_on_irq_stack+0x30/0x48<br />
do_interrupt_handler+0x80/0x84<br />
el1_interrupt+0x34/0x68<br />
el1h_64_irq_handler+0x18/0x24<br />
el1h_64_irq+0x6c/0x70<br />
default_idle_call+0x28/0x58 (P)<br />
do_idle+0x1f8/0x250<br />
cpu_startup_entry+0x34/0x3c<br />
rest_init+0xd8/0xe0<br />
console_on_rootfs+0x0/0x6c<br />
__primary_switched+0x88/0x90<br />
---[ end trace 0000000000000000 ]---
Gravedad: Pendiente de análisis
Última modificación:
04/12/2025